1. Field of the Invention
The present invention relates to a circuit for amplifying single-ended differential signals and a method of sensing bit line data carried within the amplified signal.
2. Background Art
FIG. 1 schematically illustrates a memory system where bit line data is read from one or more memory cells. The bit line data may be read by a sense amplifier as being high or low depending on whether a voltage of the bit line (BL) is higher or lower than a reference voltage (Vref). Pressure, voltage, and temperature (PVT) variations within the system can influence the voltage differential required to properly read data from the cells. One cell may output a lower voltage than another cell or one sense amplifier may receive a lower Vref than another cell. Since the Vref is fixed and commonly supplied to each sense amplifier, the value of Vref may be selected to correspond with the worst case PVT conditions. The worst case condition compensations can require the value of Vref to be selected in a manner that insures a sufficient voltage differential. A large voltage differential can increase the time it takes to read data from the cells.
FIG. 2 graphically illustrates reading a single-ended differential signal used to carry the bit line data. A left portion of the illustration corresponds with reading a low value from a cell when BL is sufficiently less than Vref. A right portion of the illustration corresponds with reading a high value from a cell when BL is sufficiently greater than Vref. The sense amplifier is unable to properly read the data until a sufficient voltage differential is generated. As shown with respect to reading a low value, a particular period of time may have to transpire before the BL is sufficiently less than Vref. This period of time is directly proportional to the time it takes to read data from the cells.